Update

I’m not doing run-time cache-line alignment after all.

As I started to get back to it, I remembered why I hadn’t done it in the first place – the instruction to get ERG length on ARM is priviledged. You can’t run it from user-mode.

*facepalm*

So I have my code which can try empirically to determine the ERG length, but I have no code to figure out cache-line length. Maybe I could try to think of some, but… all this empirical stuff sucks.

In other news, the x86 dev board I ordered arrived and I have successfully installed Debian and configured the board. It is now building GCC 4.8.5!

Oddly, the cache line length is marked as 64 bytes, rather than 32. My laptop is marked as 64 bytes, which is what I’d expect for an x86_64.

In other other news, this web-server server is likely to have a fresh OS install which means I’ll need to rebuild everything. That may happen over this weekend, and by the end of it I damn well intend to have Bugzilla again at last.