I might be getting something.
First, you assert that a thread can only register with a single SMR. It’s a loss of flexibility, but it seems okay – you’re only going to want a thread to work with a NUMA local SMR anyway.
The SMR library has single thread SMR state stored in TLS. A thread SMR state now will also store a pointer to it’s SMR state, so the SMR state doesn’t need to be passed around – only the thread SMR state – and that doesn’t need to be passed around, because it’s in TLS.
So this gets you argument-less SMR, where many DSIs share a single SMR.
But then I realised something important; thread SMR states are almost independent from SMR states. By this I mean to say a thread SMR state is really more like an activity record for a thread – it can belong concurrently in any number of SMR states.
(Actually, I’m not 100% sure of this – but fairly close – and I’m running for now with the idea it could be made so).
The only real connection between the SMR state and the (now so named) thread activity record is that an SMR state needs to keep track of all thread activity records registered with it, so they can be scanned. So the thread activity record needs to be present in many add-only atomic linked lists and where we have pre-allocation if we wanted that we’d need to provide an add-only atomic linked list element state for each SMR we register with.
That would then allow us to have a single thread activity record, taken from TLS so no argument passing, where the DSI now selects the SMR state (e.g. it’s own, since there would be one SMR state per DSI) so again no argument passing.
So, questions are; is a thread activity record truely able to be used concurrently in many SMR states? and if so, can we reasonably arrange the list element states?
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